[PATCH 02/20] arm/arm64: KVM: Complete WFI/WFE instructions

Discussion:

zhuyijun

2014-10-17 09:32:06 UTC

From: Christoffer Dall <***@linaro.org>

The architecture specifies that when the processor wakes up from a WFE
or WFI instruction, the instruction is considered complete, however we
currrently return to EL1 (or EL0) at the WFI/WFE instruction itself.

While most guests may not be affected by this because their local
exception handler performs an exception returning setting the event bit
or with an interrupt pending, some guests like UEFI will get wedged due
this little mishap.

Simply skip the instruction when we have completed the emulation.

Cc: <***@vger.kernel.org>
Acked-by: Marc Zyngier <***@arm.com>
Cc: Ard Biesheuvel <***@linaro.org>
Signed-off-by: Christoffer Dall <***@linaro.org>
---
arch/arm/kvm/handle_exit.c | 2 ++
arch/arm64/kvm/handle_exit.c | 2 ++
2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c
index 4c979d4..a96a804 100644
--- a/arch/arm/kvm/handle_exit.c
+++ b/arch/arm/kvm/handle_exit.c
@@ -93,6 +93,8 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
else
kvm_vcpu_block(vcpu);

+ kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
+
return 1;
}

diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index 182415e..2ca885c 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch/arm64/kvm/handle_exit.c
@@ -66,6 +66,8 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
else
kvm_vcpu_block(vcpu);

+ kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
+
return 1;
}

--
1.7.1

zhuyijun

2014-10-17 09:32:05 UTC

Permalink

From: Pranavkumar Sawargaonkar <***@linaro.org>

X-Gene u-boot runs in EL2 mode with MMU enabled hence we might
have stale EL2 tlb enteris when we enable EL2 MMU on each host CPU.

This can happen on any ARM/ARM64 board running bootloader in
Hyp-mode (or EL2-mode) with MMU enabled.

This patch ensures that we flush all Hyp-mode (or EL2-mode) TLBs
on each host CPU before enabling Hyp-mode (or EL2-mode) MMU.

Cc: <***@vger.kernel.org>
Tested-by: Mark Rutland <***@arm.com>
Reviewed-by: Marc Zyngier <***@arm.com>
Signed-off-by: Pranavkumar Sawargaonkar <***@linaro.org>
Signed-off-by: Anup Patel <***@linaro.org>
Signed-off-by: Christoffer Dall <***@linaro.org>
---
arch/arm/kvm/init.S | 4 ++++
arch/arm64/kvm/hyp-init.S | 4 ++++
2 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 1b9844d..ee4f744 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -98,6 +98,10 @@ __do_hyp_init:
mrc p15, 0, r0, c10, c2, 1
mcr p15, 4, r0, c10, c2, 1

+ @ Invalidate the stale TLBs from Bootloader
+ mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
+ dsb ish
+
@ Set the HSCTLR to:
@ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
@ - Endianness: Kernel config
diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S
index d968796..c319116 100644
--- a/arch/arm64/kvm/hyp-init.S
+++ b/arch/arm64/kvm/hyp-init.S
@@ -80,6 +80,10 @@ __do_hyp_init:
msr mair_el2, x4
isb

+ /* Invalidate the stale TLBs from Bootloader */
+ tlbi alle2
+ dsb sy
+
mrs x4, sctlr_el2
and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
ldr x5, =SCTLR_EL2_FLAGS

--
1.7.1

Christoffer Dall

2014-10-17 09:36:28 UTC

Permalink

Hi Zhuyjin,

Why are you cc'ing me patches that are already applied to the kvm/arm tree?

This looks like you're doing some git send-email command and forgot to
suppress the CC. Please be more careful in the future, as this is
quite confusing to everyone!

-Christoffer

Post by zhuyijun
X-Gene u-boot runs in EL2 mode with MMU enabled hence we might
have stale EL2 tlb enteris when we enable EL2 MMU on each host CPU.
This can happen on any ARM/ARM64 board running bootloader in
Hyp-mode (or EL2-mode) with MMU enabled.
This patch ensures that we flush all Hyp-mode (or EL2-mode) TLBs
on each host CPU before enabling Hyp-mode (or EL2-mode) MMU.
---
arch/arm/kvm/init.S | 4 ++++
arch/arm64/kvm/hyp-init.S | 4 ++++
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 1b9844d..ee4f744 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
mrc p15, 0, r0, c10, c2, 1
mcr p15, 4, r0, c10, c2, 1
+ dsb ish
+
@ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
@ - Endianness: Kernel config
diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S
index d968796..c319116 100644
--- a/arch/arm64/kvm/hyp-init.S
+++ b/arch/arm64/kvm/hyp-init.S
msr mair_el2, x4
isb
+ /* Invalidate the stale TLBs from Bootloader */
+ tlbi alle2
+ dsb sy
+
mrs x4, sctlr_el2
and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
ldr x5, =SCTLR_EL2_FLAGS
--
1.7.1

Yijun Zhu

2014-10-20 00:37:02 UTC

Permalink

Post by Christoffer Dall
Hi Zhuyjin,
Why are you cc'ing me patches that are already applied to the kvm/arm tree?
This looks like you're doing some git send-email command and forgot to
suppress the CC. Please be more careful in the future, as this is
quite confusing to everyone!

I'm sorry for giving trouble to all of you! It will never happen...

Post by Christoffer Dall
-Christoffer